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| d a t a sh eet product speci?cation 2003 oct 21 integrated circuits tef6892h car radio integrated signal processor
2003 oct 21 2 philips semiconductors product speci?cation car radio integrated signal processor tef6892h contents 1 features 1.1 general 1.2 i 2 c-bus 1.3 stereo decoder 1.4 noise blanking 1.5 weak signal processing 1.6 rds demodulator and decoder 1.7 tone/volume part 2 general description 3 ordering information 4 quick reference data 5 block diagram 6 pinning 7 functional description 7.1 stereo decoder 7.2 fm and am noise blanker 7.3 high cut control and de-emphasis 7.4 noise detector 7.4.1 fm noise detector 7.4.2 am noise detector 7.5 multipath/weak signal processing 7.6 tone/volume control 7.6.1 input selector 7.6.2 loudness 7.6.3 volume/balance 7.6.4 treble 7.6.5 bass 7.6.6 fader/mute 7.6.7 beep generator and nav input with output mixer 7.7 rds demodulator and decoder 7.7.1 rds demodulator 7.7.2 rds decoder 8 limiting values 9 thermal characteristics 10 characteristics 11 i 2 c-bus protocol 11.1 read mode 11.1.1 data byte 1; status 11.1.2 data byte 2; level 11.1.3 data byte 3; usn and wam 11.1.4 data byte 4; rds status 11.1.5 data byte 5; rds ldatm 11.1.6 data byte 6; rds ldatl 11.1.7 data byte 7; rds pdatm 11.1.8 data byte 8; rds pdatl 11.1.9 data byte 9; rds count 11.1.10 data byte 10; rds pbin 11.2 write mode 11.2.1 subaddress 0h; rds set a 11.2.2 subaddress 1h; rds set b 11.2.3 subaddress 2h; rdsclk 11.2.4 subaddress 3h; rds control 11.2.5 subaddress 4h; control 11.2.6 subaddress 5h; csalign 11.2.7 subaddress 6h; multipath 11.2.8 subaddress 7h; snc 11.2.9 subaddress 8h; highcut 11.2.10 subaddress 9h; softmute 11.2.11 subaddress ah; radio 11.2.12 subaddress bh; input and asi 11.2.13 subaddress ch; loudness 11.2.14 subaddress dh; volume 11.2.15 subaddress eh; treble 11.2.16 subaddress fh; bass 11.2.17 subaddress 10h; fader 11.2.18 subaddress 11h; balance 11.2.19 subaddress 12h; mix 11.2.20 subaddress 13h; beep 11.2.21 subaddress 1fh; autogate 12 test and application information 13 package outline 14 soldering 14.1 introduction to soldering surface mount packages 14.2 reflow soldering 14.3 wave soldering 14.4 manual soldering 14.5 suitability of surface mount ic packages for wave and reflow soldering methods 15 data sheet status 16 definitions 17 disclaimers 18 purchase of philips i 2 c components 2003 oct 21 3 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 1 features 1.1 general high integration no external components except coupling capacitors for signal inputs and outputs qfp44 package with small printed-circuit board (pcb) footprint. 1.2 i 2 c-bus fast mode 400 khz i 2 c-bus, interfaces to logic levels ranging from 2.5 to 5 v gated i 2 c-bus loop through to tuner ic C eases pcb layout (crosstalk) C allows mix of 400 khz and 100 khz busses C low bus load reduces crosstalk C buffered i/o circuit C supply voltage shift between both buses allowed. shortgate function offers easy control with automatic gating of a single transmission; suited for tea684x autogate function offers transparent microcontroller control with automatic on/off gating (programmable address). 1.3 stereo decoder fm stereo decoder with high immunity to birdy noise and excellent pilot cancellation integrated if roll-off correction controlled via i 2 c-bus de-emphasis selectable between 75 and 50 m s via i 2 c-bus. 1.4 noise blanking new fully integrated am noise blanker with excellent performance fully integrated fm noise blanker with superior performance. 1.5 weak signal processing fm weak signal processing with detectors for rf level, ultrasonic noise (usn) and wideband am (wam) information am weak signal processing with detectors for level information am processing with soft mute and high cut control (hcc) fm processing with soft mute, stereo blend and hcc setting of the sensitivity of the detectors and start and slope of the control functions via i 2 c-bus weather band de-emphasis level, usn and wam read-out via i 2 c-bus (signal quality detectors) full support of tuner af update functions with tea684x tuner ics, fm audio processing holds the detectors for the fm weak signal processing in their present state during rds updating. 1.6 rds demodulator and decoder rds/rbds demodulator uses tea684x reference frequency, no external crystal necessary rds/rbds decoder with memory for two rds data blocks provides block synchronization, error correction and flywheel function; block data and status information are available via the i 2 c-bus. 2003 oct 21 4 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 1.7 tone/volume part input selector for four inputs: C two external stereo inputs (cd and tape) C one mono input (phone) C one internal stereo input (am or fm). integrated tone control and audio filters without external components volume control from +20 to - 79 db in 1 db steps; programmable 20 db loudness control included programmable loudness control with bass boost or as bass and treble boost treble control from - 14 to +14 db in 2 db steps bass control from - 14 to +14 db in 2 db steps with selectable characteristics good undistorted performance for any step size, including mute audio step interpolation (asi) available for the following audio controls: C mute C loudness C volume/balance C bass C fader. asi also realizes alternative frequency (af) mute for inaudible rds update integrated beep generator navigation (nav) input output mixer circuit for beep or nav signal at output stages. 2 general description the tef6892h is a monolithic bimos integrated circuit comprising the stereo decoder function, weak signal processing and ignition noise blanking facility for am and fm combined with input selector and tone/volume control for am and fm car radio applications. the rds/rbds demodulator function and the rds/rbds decoder function are included. the device operates with a supply voltage of 8 to 9 v. 3 ordering information type number package name description version tef6892h qfp44 plastic quad ?at package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm sot307-2 2003 oct 21 5 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 4 quick reference data symbol parameter conditions min. typ. max. unit v cc supply voltage 8.0 8.5 9.0 v i cc supply current normal mode - 28 - ma standby rds; audio on - 24 - ma standby audio; rds on - 19 - ma standby - 15 - ma stereo decoder path a cs channel separation f fmmpx = 1 khz 40 -- db s/n signal-to-noise ratio f fmmpx =20hzto15khz 75 -- db thd total harmonic distortion fm mode; f fmmpx = 1 khz -- 0.3 % tone/volume control v i(max)(rms) maximum input voltage level at pins tapel, taper, cdl, cdr, cdcm, phone and phcm (rms value) thd = 0.1%; g vol = - 6db 2 -- v v i(nav)(max)(rms) maximum input voltage level at pin nav (rms value) thd = 1%; f nav = 1 khz 0.3 -- v thd total harmonic distortion tape and cd inputs; f audio = 20 hz to 20 khz; v i = 1 v (rms) - 0.01 0.1 % g vol volume/balance gain control maximum setting - 20 - db minimum setting -- 59 - db g step(vol) step resolution gain (volume) - 1 - db g loudness loudness gain control f loudness(low) = 50 hz; high boost on maximum setting; 1 khz tone - 0 - db minimum setting; 1 khz tone -- 20 - db g treble treble gain control maximum setting - 14 - db minimum setting -- 14 - db g step(treble) step resolution gain (treble) - 2 - db g bass bass gain control maximum setting; symmetrical boost - 14 - db minimum setting; asymmetrical cut -- 14 - db g step(bass) step resolution gain (bass) - 2 - db 2003 oct 21 6 philips semiconductors product speci?cation car radio integrated signal processor tef6892h this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 5 block diagram handbook, full pagewidth noise detect noise blanker pilot cancel input select 25 26 5 23 24 21 20 22 cdl cdr cdcm tapel taper phone phcm fmmpx 7 am 6 mpxrds 1 level 3 4 sclg sdag 10 i.c. 8, 12, 13, 14, 15, 19, 31, 33, 34, 35, 36, 40 afsamp 9 afhold 37 38 39 2 rdsgnd mhc356 rdq rdda rdcl 42 sda 43 scl + + + + + + + - - pilot/ reference pll stereo decoder high cut f: 1.5 to 15 khz/wide stereo adjust roll-off correction fm/am noise detect nb sensitivity usn sensitivity level detection timings and control usn sclg 11 fref f ref sdag usn mpx snc start, slope hcc start, slope sm start, slope multipath/ weak signal detection and logic snc hcc detect sm hold rds demodulator 57 khz sclg mode rds write autogate i 2 c-bus interface supply read addr sdag rds rds decoder pulse timer tef6892h pulse timer amnb amnb fmsnc amfm- softmute afu- mute asi asi asi time asi active level/off pitch on/off asi fmnb amfmhcc fmnb fmsnc amfm- hcc wam sensitivity amfm- softmute loudness input select 0 to - 20 db low f: 50/100 hz high boost de-emphasis 50/75 m s v ref standby 44 addr 41 dgnd 18 cref 17 agnd 16 v cc 32 nav 30 rrout 29 lrout 28 rfout 27 lfout detect wam wam afus reset/hold afumute i ref f ref treble audio step interpolation (asi) beep + 14 to - 14 db f: 8 to 15 khz + 14 to - 14 db f: 60 to 120 hz shelve/band-pass bass asi asi front/rear 0 to - 59 db front/ rear fader mute: lf, rf, lr, rr mix: lf, rf, lr, rr mute mix volume/ balance/ mute vol: + 20 to - 59 db bal: l/r, 0 to - 79 db mute 57 khz 38 khz 19 khz stereo detect level fig.1 block diagram. 2003 oct 21 7 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 6 pinning symbol pin description level 1 level detector input rdsgnd 2 rds ground sclg 3 gated i 2 c-bus clock port sdag 4 gated i 2 c-bus data port fmmpx 5 fm-mpx input for audio processing mpxrds 6 fm-mpx input for weak signal processing, noise blanker and rds demodulator am 7 am audio input i.c. 8 internally connected afhold 9 fm weak signal processing hold input afsamp 10 trigger signal input for quality measurement fref 11 reference frequency input 75.4 khz i.c. 12 internally connected i.c. 13 internally connected i.c. 14 internally connected i.c. 15 internally connected v cc 16 supply voltage agnd 17 analog ground cref 18 reference voltage capacitor i.c. 19 internally connected cdr 20 cd right input cdcm 21 cd common input cdl 22 cd left input taper 23 tape right input tapel 24 tape left input phone 25 phone input phcm 26 phone common input lfout 27 left front output rfout 28 right front output lrout 29 left rear output rrout 30 right rear output i.c. 31 internally connected nav 32 audio input for navigation voice signal i.c. 33 internally connected i.c. 34 internally connected i.c. 35 internally connected i.c. 36 internally connected rdq 37 rds/rbds demodulator quality information output rdda 38 rds/rbds decoder data available or rds/rbds demodulator data output rdcl 39 rds/rbds demodulator clock input or output i.c. 40 internally connected 2003 oct 21 8 philips semiconductors product speci?cation car radio integrated signal processor tef6892h dgnd 41 digital ground sda 42 i 2 c-bus data input or output scl 43 i 2 c-bus clock input addr 44 address select input symbol pin description handbook, full pagewidth tef6892h mhc354 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 addr scl sda dgnd i.c. rdcl rdda rdq i.c. i.c. i.c. i.c. i.c. i.c. i.c. v cc agnd cref i.c. cdr cdcm cdl level rdsgnd sclg sdag fmmpx mpxrds am i.c. afhold afsamp fref i.c. nav i.c. rrout lrout rfout lfout phcm phone tapel taper fig.2 pin configuration. 7 functional description 7.1 stereo decoder the fmmpx input is the input for the mpx signal from the tuner. the input gain can be selected in three settings to match the input to the rf front-end circuit. a fourth setting is used for weather band mode, which may require a gain of 23.5 db. a low-pass filter provides the necessary signal delay for fm noise blanking and suppression of high frequency interferences into the stereo decoder input. the output signal of this filter is fed to the roll-off correction circuit. this circuit compensates the frequency response caused by the low-pass characteristic of the tuner circuit with its if filters. the roll-off correction circuit is adjustable in four settings to compensate different frequency responses of the tuner part. the mpx signal is decoded in the stereo decoder part. a pll is used for the regeneration of the 38 khz subcarrier. the fully integrated oscillator is adjusted by a digital auxiliary pll into the capture range of the main pll. the auxiliary pll needs an external reference frequency (75.4 khz) which is provided by the tuner ics of the nice family (tea684x). the required 19 and 38 khz signals are generated by division of the oscillator output signal in a logic circuit. the 19 khz quadrature phase signal is fed to the 19 khz phase detector, where it is compared with the incoming pilot tone. the dc output signal of the phase detector controls the oscillator (pll). 2003 oct 21 9 philips semiconductors product speci?cation car radio integrated signal processor tef6892h the pilot detector is driven by an internally generated in-phase 19 khz signal. its pilot dependent voltage activates the stereo indicator bit and sets the stereo decoder to stereo mode. the same voltage is used to control the amplitude of an anti-phase internally generated 19 khz signal. in the pilot canceller, the pilot tone is compensated by this anti-phase 19 khz signal. the signal is then decoded in the decoder part. the side signal is demodulated and combined with the main signal to the left and right audio channels. a fine adjustment of the roll-off compensation is done by adjusting the gain of the l-r signal in 16 steps. a smooth mono to stereo takeover is achieved by controlling the efficiency of the matrix by the fmsnc signal from the weak signal processing block. 7.2 fm and am noise blanker the fm/am switch selects the output signal of the stereo decoder (fm mode) or the signal from the am input for the noise blanker block. in fm mode the noise blanker operates as a sample and hold circuit, while in am mode it mutes the audio signal during the interference pulse. the blanking pulse which triggers the noise blanker is generated in the noise detector block. 7.3 high cut control and de-emphasis the high cut control (hcc) part is a low-pass filter circuit with eight different static roll-off response curves. the cut-off frequencies of these filter curves can be selected by i 2 c-bus to match different application requirements. the hcc circuit also provides a dynamic control of the filter response. this function is controlled by the amfmhcc signal from the weak signal processing. the signal passes the de-emphasis block with two de-emphasis values (50 and 75 m s), which can be selected via i 2 c-bus, and is fed to the input selector. 7.4 noise detector 7.4.1 fm noise detector the trigger signal for the fm noise detector is derived from the mpxrds input signal and the level signal. in the mpxrds path a four pole high-pass filter (100 khz) separates the noise spikes from the wanted mpx signal. another detector circuit triggers on noise spikes on the level voltage. the signals of both detectors are combined to achieve a reliable trigger signal for the noise blanker. agc circuits in the detector part control the gain depending on the average noise in the signals to prevent false triggering. the sensitivity of the triggering from the mpxrds signal can be adjusted in four steps, the triggering from the level signal in three steps. 7.4.2 am noise detector the trigger pulse for the am noise blanker is derived from the am audio signal. the noise spikes are detected by a slew rate detector, which detects excessive slew rates which do not occur in normal audio signals. the sensitivity of the am noise blanker can be adjusted in four steps. 7.5 multipath/weak signal processing the multipath (mph)/weak signal processing block detects quality degradations in the incoming fm signal and controls the processing of the audio signal accordingly. there are three different quality criteria: the average value of the level voltage the am components on the level voltage [wideband am (wam)] the high frequency components in the mpx signal [ultrasonic noise (usn)]. the level voltage is converted to a digital value by an 8-bit analog-to-digital converter. a digital filter circuit (wam filter) derives the wideband am components from the level signal. the high frequency components in the mpx signals are measured with an analog-to-digital converter (usn adc) at the output of the 100 khz high-pass filter in the mpxrds path. the values of these three signals are externally available via the i 2 c-bus. in the weak signal processing block the three digital signals are combined in a specific way and used for the generation of control signals for soft mute, stereo blend (stereo noise control, fmsnc) and high cut control (amfmhcc). the sensitivities of the detector circuits (wam and usn) are adjustable via the i 2 c-bus. also the start values and the slopes of the control functions soft mute, stereo blend and high cut control can be set via the i 2 c-bus. soft mute, stereo blend and hcc are set on hold during the af updating (quality check of alternative frequency) to avoid an influence of the tuning procedure on the weak signal processing conditions. in am mode the soft mute and high cut control are available too, the weak signal block is controlled by the average value of the level voltage. 2003 oct 21 10 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 7.6 tone/volume control the tone/volume control part consists of the following stages: input selector loudness control volume/balance control with muting treble control bass control fader and output mute beep generator nav input output mixer. the settings of all stages are controlled via the i 2 c-bus. the stages input selector, loudness, volume/balance, bass, and fader/output mute include the audio step interpolation (asi) function. this minimizes pops by smoothing the transitions in the audio signal during the switching of the controls. the transition time of the asi function is programmable by i 2 c-bus in four steps. 7.6.1 i nput selector the input selector selects one of four input sources: two external stereo inputs (cd and tape) one external mono input (phone) one internal stereo input (am/fm). 7.6.2 l oudness the output of the input selector is fed into the loudness circuit. four different loudness curves can be selected via the i 2 c-bus. the control range is between 0 and - 20 db with a step size of 1 db; see figs 16 to 19. 7.6.3 v olume / balance the volume/balance control is used for volume setting and also for balance adjustment. the control range of the volume/balance control is between +20 and - 59 db in steps of 1 db. the combination of loudness and volume/balance realizes an overall control range of +20 to - 79 db. 7.6.4 t reble the signal is then fed to the treble control stage. the control range is between +14 and - 14 db in steps of 2 db. figure 20 shows the control characteristic. four different filter frequencies can be selected. 7.6.5 b ass the characteristic of the bass attenuation curves can be set to shelve or band-pass. four different frequencies can be selected as centre frequency of the band-pass curve. figures 21 and 22 show the bass curves with a band-pass filter frequency of 60 hz. the control range is between +14 and - 14 db in steps of 2 db. 7.6.6 f ader / mute the four fader/mute blocks are located at the end of the tone/volume chain. the control range of these attenuators is 0 to - 59 db. the step size is: 1 db between 0 and - 15 db 2.5 db between - 15 and - 45 db 3 db between - 45 and - 51 db 4 db between - 51 and - 59 db. 7.6.7 b eep generator and nav input with output mixer the output mixer circuit can add an additional audio signal to any of the four outputs together with the main signal or instead of the main signal. the additional signal can be generated internally by the beep generator with four different audio frequencies or applied to the nav input, for instance a navigation voice signal. 7.7 rds demodulator and decoder 7.7.1 rds demodulator the rds demodulator recovers and regenerates the continuously transmitted rds or rbds data stream of the multiplex signal (mpxrds) and provides the signals clock (rdcl), data (rdda) and quality (rdq) for external use or further processing by the integrated rds decoder. the rds demodulator uses the reference frequency (75.4 khz) from the tuner ic and does not need a crystal. 7.7.2 rds decoder the rds decoder provides block synchronization, error correction and flywheel function for reliable extraction of rds or rbds block data. different modes of operation can be selected to fit different application requirements. availability of new data is signalled by read bit rdav and output pin rdda. up to two blocks of data and status information are available via the i 2 c-bus in a single transmission. 2003 oct 21 11 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 8 limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. machine model (r = 0 w , c = 200 pf). 2. human body model (r = 1.5 k w , c = 100 pf). 9 thermal characteristics 10 characteristics fm part: f fmmpx = 1 khz at v fmmpx = 767 mv (rms); pilot off (100% fm). am part: f am = 1 khz at v am = 967 mv (rms) (100% am). treble: 10 khz ?lter frequency. bass: 60 hz ?lter frequency. loudness: 50 hz ?lter frequency; treble loudness on. v cc = 8.5 v; t amb =25 c; see fig.23; unless otherwise speci?ed. symbol parameter conditions min. max. unit v cc supply voltage - 0.3 +10 v v i input voltage for any pin - 0.3 v cc + 0.3 v t stg storage temperature - 65 +150 c t amb ambient temperature - 40 +85 c v esd electrostatic discharge voltage note 1 - 200 +200 v note 2 - 2000 +2000 v symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 61 k/w symbol parameter conditions min. typ. max. unit v cc supply voltage 8.0 8.5 9.0 v i cc supply current normal mode - 28 - ma standby rds; audio on - 24 - ma standby audio; rds on - 19 - ma standby - 15 - ma logic pins v ih high-level input voltage pins sda, scl, addr, sdag and rdcl 1.75 - 5.5 v pins afhold and afsamp 1.75 - 5.5 v v il low-level input voltage pins sda, scl, addr, sdag and rdcl - 0.2 - +1.0 v pins afhold and afsamp - 0.2 - +1.0 v v oh high-level output voltage pins rdcl and rdda; i oh = 2.5 m a 2.6 -- v v ol low-level output voltage pins sclg, rdcl and rdda; i ol = 3 ma; note 1 -- 0.4 v pin sda; i ol =3ma -- 0.4 v 2003 oct 21 12 philips semiconductors product speci?cation car radio integrated signal processor tef6892h stereo decoder and am path v o(fm)(rms) fm mono output voltage (rms value) on pins lfout and rfout f fmmpx = 1 khz; 91% fm modulation without pilot (v fmmpx = 698 mv) 750 950 1200 mv v o(am)(rms) am output voltage (rms value) on pins lfout and rfout f am = 1 khz; v am = 870 mv; 90% am modulation 800 1080 1360 mv g i input gain on pins fmmpx, mpxrds and am see table 61 ing[1:0] = 00; all inputs - 0 - db ing[1:0] = 01; all inputs - 3 - db ing[1:0] = 10; all inputs - 6 - db ing[1:0] = 11; fmmpx - 23.5 - db ing[1:0] = 11; mpxrds and am - 0 - db a cs channel separation f fmmpx = 1 khz 40 -- db g c(l-r) roll-off correction for coarse adjustment of separation see table 45; measure 1 khz level for l - r modulation; compare to 1 khz level for l + r modulation csr[1:0] = 00 - 0 - db csr[1:0] = 01 - 0.4 - db csr[1:0] = 10 - 0.8 - db csr[1:0] = 11 - 1.2 - db g f(l-r) stereo adjust for ?ne adjustment of separation see table 46; measure 1 khz level for l - r modulation; compare to 1 khz level for l + r modulation csa[3:0] = 0000 - 0 - db csa[3:0] = 0001 - 0.2 - db : - : - db csa[3:0] = 1110 - 2.8 - db csa[3:0] = 1111 - 3.0 - db s/n signal-to-noise ratio f fmmpx = 20 hz to 15 khz; referenced to 1 khz at 91% fm modulation; demp = 1 ( t de-em =50 m s) 75 -- db thd total harmonic distortion fm mode f fmmpx = 1 khz -- 0.3 % v fmmpx = 50%; l; pilot on -- 0.3 % v fmmpx = 50%; r; pilot on -- 0.3 % v o(bal) mono channel balance fm mode - 1 - +1 db a 19 pilot signal suppression 9% pilot; f pilot = 19 khz; referenced to 1 khz at 91% fm modulation; demp = 1 ( t de-em =50 m s) 40 50 - db symbol parameter conditions min. typ. max. unit v ol v or --------- - 2003 oct 21 13 philips semiconductors product speci?cation car radio integrated signal processor tef6892h a subcarrier suppression modulation off; referenced to 1 khz at 91% fm modulation f sc = 38 khz 35 50 - db f sc = 57 khz 40 -- db f sc = 76 khz 50 60 - db psrr power supply ripple rejection fm mode; f ripple = 100 hz; v cc(ac) =v ripple = 100 mv (rms) 24 -- db d v out frequency response fm mode f fmmpx =20hz - 0.5 - +0.5 db f fmmpx = 15 khz - 0.5 - +0.5 db f cut-off(de-em) cut-off frequency of de-emphasis ?lter - 3 db point; see fig.15 demp = 1 ( t de-em =50 m s) - 3.18 - khz demp = 0 ( t de-em =75 m s) - 2.12 - khz m i(pilot)(rms) pilot threshold modulation for automatic switching by pilot input voltage (rms value) stereo on - 4.0 5.5 % off 1.3 2.7 - % hys pilot hysteresis of pilot threshold voltage - 2 - db v ref(min) minimum reference input voltage -- 30 mv f ref reference frequency for stereo pll and rds demodulator 75361 75368 75375 hz noise blanker fm pa rt t sup(min) minimum suppression time - 15 -m s v mpxrds(m) noise blanker sensitivity at mpxrds input (peak value of noise pulses) see table 62; t pulse =10 m s; f pulse = 300 hz nbs[1:0] = 00 - 90 - mv nbs[1:0] = 01 - 150 - mv nbs[1:0] = 10 - 210 - mv nbs[1:0] = 11 - 270 - mv v level(m) noise blanker sensitivity at level input (peak value of noise pulses) see table 65; t pulse =10 m s; f pulse = 300 hz nbl[1:0] = 00 - 9 - mv nbl[1:0] = 01 - 18 - mv nbl[1:0] = 10 - 28 - mv symbol parameter conditions min. typ. max. unit 2003 oct 21 14 philips semiconductors product speci?cation car radio integrated signal processor tef6892h am pa rt t sup(min) minimum suppression time - 200 -m s m am noise blanker sensitivity see table 62; f audio = 2 khz nbs[1:0] = 00 - 110 - % nbs[1:0] = 01 - 140 - % nbs[1:0] = 10 - 175 - % nbs[1:0] = 11 - 220 - % weak signal processing d etectors v eq(usn) usn sensitivity equivalent level voltage see fig.5; f mpxrds = 150 khz; v mpxrds = 250 mv (rms); hcmp = 1; note 2 uss[1:0] = 00 - 2.5 - v uss[1:0] = 01 - 2 - v uss[1:0] = 10 - 1.5 - v uss[1:0] = 11 - 0.5 - v v eq(wam) wam sensitivity equivalent level voltage see fig.6; v level = 200 mv (p-p) at f = 21 khz on the level voltage; hcmp = 1; note 2 was[1:0] = 00 - 2.5 - v was[1:0] = 01 - 2 - v was[1:0] = 10 - 1.5 - v was[1:0] = 11 - 0.5 - v t level(attack) level detector attack time (soft mute and hcc) see table 49; letf = 0; sear = 0 let[1:0] = 00 - 3 - s let[1:0] = 01 - 3 - s let[1:0] = 10 - 1.5 - s let[1:0] = 11 - 0.5 - s see table 49; letf = 1; sear = 0 let[1:0] = 00 - 0.5 - s let[1:0] = 01 - 0.17 - s let[1:0] = 10 - 0.06 - s let[1:0] = 11 - 0.06 - s search mode; sear = 1 - 60 - ms symbol parameter conditions min. typ. max. unit 2003 oct 21 15 philips semiconductors product speci?cation car radio integrated signal processor tef6892h t level(decay) level detector decay time (soft mute and hcc) see table 49; letf = 0; sear = 0 let[1:0] = 00 - 3 - s let[1:0] = 01 - 6 - s let[1:0] = 10 - 1.5 - s let[1:0] = 11 - 1.5 - s see table 49; letf = 1; sear = 0 let[1:0] = 00 - 0.5 - s let[1:0] = 01 - 0.5 - s let[1:0] = 10 - 0.17 - s let[1:0] = 11 - 0.06 - s search mode; sear = 1 - 60 - ms t mph(attack) multipath detector attack time (snc) see table 50; sear = 0 mpt[1:0] = 00 - 0.5 - s mpt[1:0] = 01 - 0.5 - s mpt[1:0] = 10 - 0.5 - s mpt[1:0] = 11 - 0.25 - s search mode; sear = 1 - 60 - ms t mph(decay) multipath detector decay time (snc) see table 50; sear = 0 mpt[1:0] = 00 - 12 - s mpt[1:0] = 01 - 24 - s mpt[1:0] = 10 - 6 - s mpt[1:0] = 11 - 6 - s search mode; sear = 1 - 60 - ms t usn(attack) usn detector attack time (soft mute and snc) - 1 - ms t usn(decay) usn detector decay time (soft mute and snc) - 1 - ms d uss usn detector desensitization usn sensitivity setting (uss) versus level voltage (usn sensitivity setting is automatically reduced as level voltage decreases) v level > 1.25 v -- 3 - 1.25v>v level > 1.125 v -- 2 - 1.125 v > v level > 1.0 v -- 1 - 1.0v>v level -- 0 - t wam(attack) wam detector attack time (snc) - 1 - ms t wam(decay) wam detector decay time (snc) - 1 - ms t peak(usn)(attack) peak detector for usn attack time for read-out via i 2 c-bus - 1 - ms symbol parameter conditions min. typ. max. unit 2003 oct 21 16 philips semiconductors product speci?cation car radio integrated signal processor tef6892h t peak(usn)(decay) peak detector for usn decay time for read-out via i 2 c-bus - 10 - ms t peak(wam)(attack) peak detector for wam attack time for read-out via i 2 c-bus - 1 - ms t peak(wam)(decay) peak detector for wam decay time for read-out via i 2 c-bus - 10 - ms c ontrol functions v start(mute) soft mute start voltage see fig.12; voltage at pin level that causes a mute = 3 db; msl[1:0] = 11 mst[2:0] = 000 - 0.75 - v mst[2:0] = 001 - 0.88 - v mst[2:0] = 010 - 1 - v mst[2:0] = 011 - 1.12 - v mst[2:0] = 100 - 1.25 - v mst[2:0] = 101 - 1.5 - v mst[2:0] = 110 - 1.75 - v mst[2:0] = 111 - 2 - v c mute soft mute slope see fig.13; slope of soft mute attenuation with respect to level voltage; mst[2:0] = 000 msl[1:0] = 00 - 8 - db/v msl[1:0] = 01 - 16 - db/v msl[1:0] = 10 - 24 - db/v msl[1:0] = 11 - 32 - db/v a mute(max) maximum soft mute attenuation by usn see fig.14; f mpxrds = 150 khz; v mpxrds = 0.6 v (rms); uss[1:0] = 11 umd[1:0] = 00 - 3 - db umd[1:0] = 01 - 6 - db umd[1:0] = 10 - 9 - db umd[1:0] = 11 - 12 - db v start(snc) snc stereo blend start voltage see fig.7; voltage at pin level that causes channel separation = 10 db; ssl[1:0] = 10 sst[3:0] = 0000 - 1.5 - v : - : - v sst[3:0] = 1000 - 2.0 - v : - : - v sst[3:0] = 1111 - 2.45 - v symbol parameter conditions min. typ. max. unit c mute a mute d v eq d ----------------- = 2003 oct 21 17 philips semiconductors product speci?cation car radio integrated signal processor tef6892h c snc snc slope see fig.8; slope of channel separation between 30 db and 10 db with respect to level voltage; sst[3:0] = 1010 ssl[1:0] = 00 - 38 - db/v ssl[1:0] = 01 - 51 - db/v ssl[1:0] = 10 - 63 - db/v ssl[1:0] = 11 - 72 - db/v v start(hcc) hcc start voltage see fig.9; f audio = 10 khz; voltage at pin level that causes a hcc = 3 db; hsl[1:0] = 10 hst[2:0] = 000 - 1.17 - v hst[2:0] = 001 - 1.42 - v hst[2:0] = 010 - 1.67 - v hst[2:0] = 011 - 1.92 - v hst[2:0] = 100 - 2.17 - v hst[2:0] = 101 - 2.67 - v hst[2:0] = 110 - 3.17 - v hst[2:0] = 111 - 3.67 - v c hcc hcc slope see fig.10; f audio = 10 khz; hst[2:0] = 010 hsl[1:0] = 00 - 9 - db/v hsl[1:0] = 01 - 11 - db/v hsl[1:0] = 10 - 14 - db/v hsl[1:0] = 11 - 18 - db/v a hcc(max) maximum hcc attenuation see fig.10; f audio =10khz hcsf = 1 - 10 - db hcsf = 0 - 14 - db f cut-off cut-off frequency of ?xed hcc see table 56; - 3 db point (first order filter) hcf[2:0] = 000 - 1.5 - khz hcf[2:0] = 001 - 2.2 - khz hcf[2:0] = 010 - 3.3 - khz hcf[2:0] = 011 - 4.7 - khz hcf[2:0] = 100 - 6.8 - khz hcf[2:0] = 101 - 10 - khz hcf[2:0] = 110 - wide -- hcf[2:0] = 111 - unlimited -- analog-to-digital converters for i 2 c-bus l evel analog - to - digital converter (8- bit ); see fig.4 v level(min) lower voltage limit of conversion range - 0.25 - v symbol parameter conditions min. typ. max. unit c snc a cs d v eq d ------------ - = c hcc a hcc d v eq d ---------------- - = 2003 oct 21 18 philips semiconductors product speci?cation car radio integrated signal processor tef6892h v level(max) upper voltage limit of conversion range - 4.25 - v d v level bit resolution voltage - 15.7 - mv u ltrasonic noise analog - to - digital converter (4- bit ); see fig.5 v usn(min)(rms) conversion range lower voltage limit (rms value) f fmmpx = 150 khz - 0 - v v usn(max)(rms) conversion range upper voltage limit (rms value) f fmmpx = 150 khz - 0.75 - v d v usn(rms) bit resolution voltage (rms value) - 50 - mv w ideband am analog - to - digital converter (4- bit ); see fig.6 v wam(min)(p-p) lower voltage limit of conversion range (peak-to-peak value) f level =21khz - 0 - mv v wam(max)(p-p) upper voltage limit of conversion range (peak-to-peak value) f level =21khz - 800 - mv d v wam(p-p) bit resolution voltage (peak-to-peak value) - 53.3 - mv tone/volume control z i input impedance at pins tapel, taper, cdl and cdr 80 -- k w input impedance at pin phone 50 -- k w z o output impedance at pins lfout, rfout, lrout and rrout -- 100 w g s(main) signal gain from main source input to lfout, rfout, lrout and rrout outputs - 1 - +1 db g s(nav) signal gain from nav input to lfout, rfout, lrout and rrout outputs - 1.5 0 +1.5 db v i(max)(rms) maximum input voltage level at pins tapel, taper, cdl, cdr and phone (rms value) thd = 0.1%; g vol = - 6db 2 -- v v i(nav)(max)(rms) maximum input voltage level at pin nav (rms value) thd = 1% 0.3 -- v symbol parameter conditions min. typ. max. unit 2003 oct 21 19 philips semiconductors product speci?cation car radio integrated signal processor tef6892h v o(max)(rms) maximum output voltage (rms value) thd = 0.1%; g vol =+6db 2 -- v worst case load: r l =2k w , c l = 10 nf, thd = 1% 2 -- v f max frequency response (pins taper, tapel, cdr and cdl) upper - 0.5 db point; referenced to 1 khz 20 -- khz cmrr common mode rejection ratio f audio = 20 hz to 20 khz on cd and phone inputs g vol =0db 40 -- db g vol = - 15 db 55 -- db a cs channel separation f audio = 20 hz to 20 khz 60 80 - db a s input isolation of one selected source to any other input f audio = 1 khz 90 105 - db f audio = 20 hz to 10 khz 75 90 - db f audio = 20 khz 70 -- db thd total harmonic distortion tape and cd inputs f audio = 20 hz to 10 khz; v i = 1 v (rms) - 0.01 0.1 % f audio = 1 khz; v i = 2 v (rms); g vol =0db - 0.02 0.1 % f audio = 20 hz to 10 khz; v i = 2 v (rms); g vol = - 10 db - 0.02 0.2 % f audio = 25 hz; v i = 500 mv (rms); g bass = +8 db; g vol =0db - 0.05 0.2 % f audio = 4 khz; v i = 500 mv (rms); g treble = +8 db; g vol =0db - 0.01 0.2 % nav input; f audio = 1 khz; v o = 300 mv (rms) -- 1% v noise(rms) noise voltage (rms value) ccir-arm weighted and 20 khz brick wall without input signal and shorted af inputs g vol =0db - 12 20 m v g bass = +6 db; g treble =+6db; g vol =0db - 24 35 m v g vol = 20 db; tape input (stereo) - 71 100 m v g vol = 20 db; cd input (quasi-differential) - 100 140 m v g vol = - 10 db - 10 18 m v g vol = - 40 db; g loudness = - 20 db - 9.5 13.5 m v outputs muted - 512 m v using a-weighting filter and 20 khz brick wall; g vol = - 10 db; g loudness = - 10 db - 6.8 10 m v nav input - 16 40 m v symbol parameter conditions min. typ. max. unit 2003 oct 21 20 philips semiconductors product speci?cation car radio integrated signal processor tef6892h d g step step error (all controls) between all adjoining steps, all outputs g = +20 to - 36 db -- 0.5 db g= - 36 to - 59 db -- 1.0 db tc asi asi time constant (switching time from any setting to any other setting) see table 67 ast[1:0] = 00 - 1 - ms ast[1:0] = 01 - 3 - ms ast[1:0] = 10 - 10 - ms ast[1:0] = 11 - 30 - ms v offset(max) maximum dc offset between any two settings (non-consecutive) on any one audio control or any one dynamic weak signal processing control - 7 - mv psrr power supply ripple rejection v cc(ac) =v ripple = 200 mv (rms) f ripple = 20 to 100 hz 35 46 - db f ripple = 1 khz 50 75 - db f ripple = 1 to 20 khz 50 65 - db a ct crosstalk between bus inputs and signal outputs f clk = 100 khz; note 3 - 110 - db t turn-on turn-on time from v cc applied to 66% ?nal dc voltage at outputs - 100 - ms l oudness f loudness(low) loudness low boost frequency; without in?uence of coupling capacitors amplitude decrease = - 3db llf = 0 - 50 - hz llf = 1 - 100 - hz f loudness(high) loudness ?lter response; without in?uence of coupling capacitors amplitude decrease = - 1 db; frequency referred to 100 khz; high boost on - 10 - khz g loudness loudness gain control f loudness(low) = 50 hz; high boost on; see fig.16 maximum setting; 1 khz tone - 0 - db minimum setting; 1 khz tone -- 20 - db minimum setting; 50 hz tone -- 3 - db minimum setting; 10 khz tone -- 16 - db minimum setting; 100 khz tone -- 15 - db step size; 1 khz tone - 1 - db v olume g vol volume/balance gain control see table 73 maximum setting - 20 - db minimum setting -- 59 - db mute attenuation; 20 hz to 20 khz input -- 80 - 70 db symbol parameter conditions min. typ. max. unit 2003 oct 21 21 philips semiconductors product speci?cation car radio integrated signal processor tef6892h g step(vol) step resolution gain (volume) see table 73 - 1 - db d g set gain set error g vol = +20 to - 36 db - 1 0 +1 db g vol = - 36 to - 59 db - 3 0 +3 db d g track gain tracking error between left and right g vol = +20 to - 36 db - 01db g vol = - 36 to - 59 db - 03db t reble f cut-off(treble) treble control ?lter cut-off frequency see table 77; - 3 db frequency referred to 100 khz trf[1:0] = 00 - 8 - khz trf[1:0] = 01 - 10 - khz trf[1:0] = 10 - 12 - khz trf[1:0] = 11 - 15 - khz g treble treble gain control see table 76 maximum setting - 14 - db minimum setting -- 14 - db g step(treble) step resolution gain (treble) see table 76 - 2 - db b ass f c(bass) bass control ?lter centre frequency see table 81 baf[1:0] = 00 - 60 - hz baf[1:0] = 01 - 80 - hz baf[1:0] = 10 - 100 - hz baf[1:0] = 11 - 120 - hz q bass bass ?lter quality factor g bass = +12 db - 1.0 -- eq bow equalizer bowing f audio = 1 khz; v i = 500 mv (rms); g bass = +12 db; f c(bass) = 60 hz; g treble = +12 db; f cut-off(treble) = 10 khz; see fig.3 - 1.8 - db g bass bass gain control see table 80 maximum setting; symmetrical boost - 14 - db minimum setting; asymmetrical cut -- 14 - db minimum setting; symmetrical cut -- 14 - db g step(bass) step resolution gain (bass) see table 80 - 2 - db f ader g fader fader gain control see table 84 maximum setting - 0 - db minimum setting -- 59 - db mute attenuation; 20 hz to 20 khz input -- 80 - 66 db symbol parameter conditions min. typ. max. unit 2003 oct 21 22 philips semiconductors product speci?cation car radio integrated signal processor tef6892h notes 1. the low voltage of pin sclg is influenced by v scl : v sclg(low) 3 v scl(low) + 0.22 v. 2. the equivalent level voltage is that value of the level voltage (at pin level) which results in the same weak signal control effect (for instance hcc roll-off) as the output value of the specified detector (usn, wam and mph). 3. crosstalk between bus inputs and signal outputs: g step(fader) step resolution gain (fader) see table 84 g fader =0to - 15 db - 1 - db g fader = - 15 to - 45 db - 2.5 - db g fader = - 45 to - 51 db - 3 - db g fader = - 51 to - 59 db - 4 - db a mute audio mute volume control: mute and output muted (bits mulf, murf, mulr and murr) 90 -- db b eep f beep beep generator frequency see table 93 bef[1:0] = 00 - 500 - hz bef[1:0] = 01 - 1 - khz bef[1:0] = 10 - 2 - khz bef[1:0] = 11 - 3 - khz v beep(rms) beep generator audio level (rms value) see table 92 bel[2:0] = 000 - 0 - mv bel[2:0] = 001 - 13.3 - mv bel[2:0] = 010 - 18 - mv bel[2:0] = 011 - 28 - mv bel[2:0] = 100 - 44 - mv bel[2:0] = 101 - 60 - mv bel[2:0] = 110 - 90 - mv bel[2:0] = 111 - 150 - mv thd beep total harmonic distortion of beep generator f beep = 1 khz or 2 khz -- 7% power-on reset (all registers in default setting, outputs muted, standby mode) v th(por) threshold voltage of power-on reset - 6.3 - v symbol parameter conditions min. typ. max. unit a ct 20log v bus(p-p) v o(rms) -------------------- - = 2003 oct 21 23 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, full pagewidth - 18 18 14 - 10 - 14 10 6 2 - 2 - 6 mhc330 10 v o (db) f audio (hz) 10 2 10 3 10 4 10 5 + 1.85 - 1.90 fig.3 equalizer bowing. g bass = +12 and - 12 db. g treble = +12 and - 12 db. f cut-off(treble) = 10 khz. f c(bass) = 60 hz. 2003 oct 21 24 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11 i 2 c-bus protocol table 1 write mode notes 1. s = start condition. 2. a = acknowledge. 3. p = stop condition. table 2 read mode notes 1. s = start condition. 2. a = acknowledge. 3. na = not acknowledge. 4. p = stop condition. table 3 ic address byte table 4 description of ic address byte 11.1 read mode 11.1.1 d ata byte 1; status table 5 format of data byte 1 s (1) address (write) a (2) subaddress a (2) data byte(s) a (2) p (3) s (1) address (read) a (2) data byte(s) a (2) data byte na (3) p (4) ic address mode 001100 addr r/ w bit symbol description 7to2 - 001100+(addr) = ic address. 1 addr address bit. 0 = pin addr is grounded; 1 = pin addr is ?oating. 0r/ w read/write. 0 = write mode; 1 = read mode. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 stin asia afus por rdav id2 id1 id0 2003 oct 21 25 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 6 description of data byte 1 11.1.2 d ata byte 2; level table 7 format of data byte 2 table 8 description of data byte 2 bit symbol description 7 stin stereo indicator. 0 = no pilot signal detected; 1 = pilot signal detected. 6 asia asi active. 0 = not active; 1 = asi step is in progress. 5 afus af update sample. 0 = lev, usn and wam information is taken from main frequency (continuous mode); 1 = lev, usn and wam information is taken from alternative frequency. continuous mode during af update and sampled mode after af update. sampled mode reverts to continuous main frequency information after read. 4 por power-on reset. 0 = standard operation (valid i 2 c-bus register settings); 1 = power-on reset detected since last read cycle (i 2 c-bus register reset). after read the bit will reset to por = 0. 3rdav rds data available. this bit indicates, that rds block data is available. 2 to 0 id[2:0] identi?cation. tef6892h device type identi?cation; id[2:0] = 010. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 lev7 lev6 lev5 lev4 lev3 lev2 lev1 lev0 bit symbol description 7 to 0 lev[7:0] level. 8-bit value of level voltage from tuner; see fig.4. handbook, halfpage 05 v level (v) v eq (v) lev [ 7:0 ] 255 0 5 0 1 2 3 4 1234 mhc331 fig.4 equivalent level voltage v eq (mph and lev detector) as a function of level voltage v level . 2003 oct 21 26 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.1.3 d ata byte 3; usn and wam table 9 format of data byte 3 table 10 description of data byte 3 11.1.4 d ata byte 4; rds status table 11 format of data byte 4 table 12 description of data byte 4 11.1.5 d ata byte 5; rds ldatm table 13 format of data byte 5 table 14 description of data byte 5 11.1.6 d ata byte 6; rds ldatl table 15 format of data byte 6 table 16 description of data byte 6 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 usn3 usn2 usn1 usn0 wam3 wam2 wam1 wam0 bit symbol description 7 to 4 usn[3:0] ultrasonic noise detector. usn content of the mpxrds audio signal; see fig.5. 3 to 0 wam[3:0] wideband am detector. wam content of the level voltage; see fig.6. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sync dofl rstd lbi2 lbi1 lbi0 elb1 elb0 bit symbol description 7 sync synchronization found status. 0 = synchronization is searched. 1 = synchronization found. 6 dofl data over?ow ?ag. 0 = normal operation. 1 = data over?ow is detected (no update). 5 rstd reset detected. 0 = normal operation. 1 = decoder reset (por) is in progress. 4 to 2 lbi[2:0] last block identi?cation. see table 25. 1 and 0 elb[1:0] error status last block. see table 26. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 lm15 lm14 lm13 lm12 lm11 lm10 lm9 lm8 bit symbol description 7 to 0 lm[15:8] block data of previously received rds block, most signi?cant byte. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 lm7 lm6 lm5 lm4 lm3 lm2 lm1 lm0 bit symbol description 7 to 0 lm[7:0] block data of previously received rds block, least signi?cant byte. 2003 oct 21 27 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.1.7 d ata byte 7; rds pdatm table 17 format of data byte 7 table 18 description of data byte 7 11.1.8 d ata byte 8; rds pdatl table 19 format of data byte 8 table 20 description of data byte 8 11.1.9 d ata byte 9; rds count table 21 format of data byte 9 table 22 description of data byte 9 11.1.10 d ata byte 10; rds pbin table 23 format of data byte 10 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 pm15 pm14 pm13 pm12 pm11 pm10 pm9 pm8 bit symbol description 7 to 0 pm[15:8] block data of previously received rds block, most signi?cant byte. only relevant when reduced data request mode is active (dac = 10; see table 40). bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 pm7 pm6 pm5 pm4 pm3 pm2 pm1 pm0 bit symbol description 7 to 0 pm[7:0] block data of previously received rds block, least signi?cant byte. only relevant when reduced data request mode is active (dac = 10; see table 40). bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bbc5 bbc4 bbc3 bbc2 bbc1 bbc0 gbc5 gbc4 bit symbol description 7 to 2 bbc[5:0] bad block counter. counter value of received invalid blocks; n=0to63. 1 and 0 gbc[5:4] good block counter. two most signi?cant bits of received valid blocks counter; n = 0 to 62. remark: the least signi?cant bit is not available for reading (assume gbc0 = 0). bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 gbc3 gbc2 gbc1 pbi2 pbi1 pbi0 epb1 epb0 2003 oct 21 28 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 24 description of data byte 10 table 25 description of data bits lbi[2:0] and pbi[2:0] table 26 description of data bits elb[1:0] and epb[1:0] 11.2 write mode table 27 format for subaddress byte with default setting bit symbol description 7 to 5 gbc[3:1] good block counter. three least signi?cant bits of received valid blocks counter; n = 0 to 62. remark: the least signi?cant bit is not available for reading (assume gbc0 = 0). 4 to 2 pbi[2:0] previous block identi?cation. see table 25. 1 and 0 epb[1:0] error status previous block. see table 26. lbi2 lbi1 lbi0 block type identification of last and previous received block data pbi2 pbi1 pbi0 000 a 001 b 010 c 011 d 100 c 1 0 1 e (rbds mode) 1 1 0 invalid e (rds mode) 1 1 1 invalid block elb1 elb0 error status of last and previous received block data epb1 epb0 0 0 no errors 0 1 corrected burst error of maximum 2 bits 1 0 corrected burst error of maximum 5 bits 1 1 uncorrectable error bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 aiof gate sgat sa4 sa3 sa2 sa1 sa0 - 00 ----- 2003 oct 21 29 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 28 description of subaddress byte table 29 selection of data byte 11.2.1 s ubaddress 0h; rds set a table 30 format of data byte 0h with default setting bit symbol description 7 aiof auto-increment off. 0 = auto-increment enabled; 1 = auto-increment disabled. 6gate gate. 0=i 2 c-bus outputs (sdag and sclg) are controllable by the shortgate or the autogate function; 1 = i 2 c-bus outputs are enabled. 5 sgat shortgate. 1=i 2 c-bus outputs (sdag and sclg) are enabled for a single transmission following this control and disabled automatically. 4 to 0 sa[4:0] data byte select. the subaddress value is auto-incremented when aiof = 0 and will revert from sa = 30 to sa = 0. sa = 31 can only be accessed via direct subaddress selection, in which case auto-increment will revert from sa = 31 to sa = 0; see table 29. sa4 sa3 sa2 sa1 sa0 hex mnemonic addressed data byte 0 0 0 0 0 0 rds set a settings of rds/rbds 0 0 0 0 1 1 rds set b settings of rds/rbds 0 0 0 1 0 2 rdsclk clock of rds/rbds 000113rds control control of rds/rbds function 0 0 1 0 0 4 control control of supply and af update 0 0 1 0 1 5 csalign alignment of stereo channel separation 0 0 1 1 0 6 multipath control of weak signal sensitivity and timing 0 0 1 1 1 7 snc alignment of snc start and slope 0 1 0 0 0 8 highcut alignment of hcc start and slope 0 1 0 0 1 9 softmute alignment soft mute start and slope 0 1 0 1 0 a radio control of radio functions 0 1 0 1 1 b input/asi source selector and asi settings 0 1 1 0 0 c loudness loudness control 0 1 1 0 1 d volume volume control 0 1 1 1 0 e treble treble control 0 1 1 1 1 f bass bass control 1 0 0 0 0 10 fader fader control 1 0 0 0 1 11 balance balance control 1 0 0 1 0 12 mix control of output mixer 1 0 0 1 1 13 beep beep generator settings 1 1 1 1 1 1f autogate autogate control bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - sym1 sym0 gbl5 gbl4 gbl3 gbl2 gbl1 00010001 2003 oct 21 30 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 31 description of data byte 0h table 32 description of synchronization mode 11.2.2 s ubaddress 1h; rds set b table 33 format of data byte 1h with default setting table 34 description of data byte 1h 11.2.3 s ubaddress 2h; rdsclk table 35 format of data byte 2h with default setting bit symbol description 7 - not used. set to logic 0. 6 and 5 sym[1:0] synchronization mode. see table 32. 4 to 0 gbl[5:1] maximum good blocks lose (0 to 63). number of valid blocks (good blocks counter) at which both the good block counter and the bad block counter are reset to 0. only used when synchronized. gbl0 is located in byte rds set b. when the bad block counter reaches value bbl (see byte rds set b) before the good block counter reaches value gbl a new synchronization is started. sym1 sym0 synchronization mode 0 0 no error correction; only error free blocks are handled as valid 0 1 limited error correction; up to 2 bits error correctable blocks are handled as valid 1 0 full error correction; up to 5 bits error correctable blocks are handled as valid 1 1 mixed mode; only error free blocks are handled as valid for synchronization search, but when synchronized, up to 5 bits error correctable blocks are handled as valid bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 gbl0 rbds bbl5 bbl4 bbl3 bbl2 bbl1 bbl0 00000001 bit symbol description 7 gbl0 maximum good blocks lose (0 to 63); see table 31. 6 rbds rbds mode. 0 = rds mode, rbds type e blocks are handled as invalid (bad block); 1 = rbds mode, rbds type e blocks are handled as valid (good block). 5 to 0 bbl[5:0] maximum bad blocks lose (0 to 63). number of invalid blocks (bad blocks counter) at which a new synchronization is started. both the good block counter and the bad block counter are reset to 0. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 -- tst3 tst2 tst1 tst0 clko clki -- 000001 2003 oct 21 31 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 36 description of data byte 2h table 37 rds clock description 11.2.4 s ubaddress 3h; rds control table 38 format of data byte 3h with default setting table 39 description of data byte 3h table 40 description of data available control bit symbol description 7 and 6 - not used. set to logic 0. 5 to 2 tst[3:0] test. tst[3:0] = 0000: normal operation. 1 clko clock input or output and buffered or unbuffered raw rds output. see table 37. 0 clki clko clki rds/rbds clock 0 0 rds decoder mode; pin rdcl is disabled 0 1 for rds decoder bypass mode; rdcl is burst clock input for raw rds read-out 1 0 for rds decoder mode: continuous block rate data available signal at pin rdcl; for rds decoder bypass mode: rdcl is clock output for raw rds read-out 1 1 reserved bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 dac1 dac0 nwsy bbg4 bbg3 bbg2 bbg1 bbg0 00000000 bit symbol description 7 and 6 dac[1:0] data available control. see table 40. 5 nwsy new synchronization search. 0 = synchronization is started by bbl value of bad block counter only; 1 = restart of synchronization search. nwsy is automatically reset to logic 0. 4 to 0 bbg[4:0] maximum bad blocks gain. number of invalid blocks (bad block counter) that is allowed during synchronization search. if reached, a new synchronization is started. bbg[4:0] = 0 disables this function. dac1 dac0 data available control 0 0 standard output mode; new block data is signalled at every new received block 0 1 fast pi search mode; during synchronization search (sync = 0) a or c block data is available and signalled, when synchronized standard output mode is active 1 0 reduced data request mode; when synchronized new block data is signalled every two new received blocks 1 1 decoder bypass mode; raw rds data from demodulator is available on pin rdda 2003 oct 21 32 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.5 s ubaddress 4h; control table 41 format of data byte 4h with default setting table 42 description of data byte 4h 11.2.6 s ubaddress 5h; csalign table 43 format of data byte 5h with default setting table 44 description of data byte 5h table 45 fm stereo channel separation bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 stbr stba afum afuh rmut - letf attb 11000 - 00 bit symbol description 7 stbr standby mode rds processing. 0 = rds processing active; 1 = rds processing in standby mode (rds off, rds outputs low). 6 stba standby mode audio processing. 0 = audio processing active; 1 = audio processing in standby mode (audio inputs and outputs at dc). 5 afum enables af update mute. 0 = af update mute disabled; 1 = af update mute enabled (controlled by afsamp and afhold input). 4 afuh af update hold function. 0 = disable, the weak signal processing hold is controlled by the afhold input only; 1 = hold. this is equal to taking the afhold input low. the bit is reset to 0, when afhold input is set to low (i.e. at af update or preset change). 3 rmut radio signal mute. 0 = no mute; 1 = mute with 1 ms asi slope at start and stop. 2 - not used. set to logic 0. 1 letf fast level detector time constants. 0 = slow level detector time constants are used; 1 = fast level detector time constants are used. see table 49. 0 attb attack bound of the mph and lev detector. 0 = detectors are unbounded; 1 = range of the mph and lev detector are limited in their range for immediate start of attack. in am mode the detectors are always unbounded. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 csr1 csr0 csa3 csa2 csa1 csa0 -- 010111 -- bit symbol description 7 and 6 csr[1:0] fm stereo channel separation (high frequency). see table 45. 5 to 2 csa[3:0] fm stereo channel separation and adjustment. see table 46. 1 and 0 - not used. set to logic 0. csr1 csr0 fm stereo channel separation (db) 00 0 0 1 0.4 1 0 0.8 1 1 1.2 2003 oct 21 33 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 46 fm stereo channel separation and adjustment 11.2.7 s ubaddress 6h; multipath table 47 format of data byte 6h with default setting table 48 description of data byte 6h table 49 setting of the time constants of the level detector table 50 setting of the time constants of the mph detector (level, wam and usn) csa3 csa2 csa1 csa0 fm stereo channel separation and adjustment (db) 0000 0 0001 0.2 :::: : 1110 2.8 1111 3.0 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 uss1 uss0 was1 was0 let1 let0 mpt1 mpt0 01010000 bit symbol description 7 and 6 uss[1:0] usn sensitivity for weak signal processing. see fig.5. 5 and 4 was[1:0] wam sensitivity for weak signal processing. see fig.6. 3 and 2 let[1:0] level detector time constant. see table 49. 1 and 0 mpt[1:0] mph detector time constants (level, wam and usn). see table 50. letf let1 let0 t level (s) attack decay 000 3 3 001 3 6 0 1 0 1.5 1.5 0 1 1 0.5 1.5 1 0 0 0.5 0.5 1 0 1 0.17 0.5 1 1 0 0.06 0.17 1 1 1 0.06 0.06 mpt1 mpt0 t mph (s) attack decay 0 0 0.5 12 0 1 0.5 24 1 0 0.5 6 1 1 0.25 6 2003 oct 21 34 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, halfpage 0 1.25 v mpxrds(rms) (v) v eq (v) 5 0 1 2 3 4 0.25 0.5 0.75 1 mhc332 (1) (2) (3) (4) fig.5 equivalent level voltage v eq (usn and mph detector) as a function of mpx signal at 150 khz. (1) uss[1:0] = 11 = - 6 v/0.5 v. (2) uss[1:0] = 10 = - 4 v/0.5 v. (3) uss[1:0] = 01 = - 3 v/0.5 v. (4) uss[1:0] = 00 = - 2 v/0.5 v. handbook, halfpage 01 v level(p-p) (v) v eq (v) 5 0 1 2 3 4 0.2 0.4 0.6 0.8 mhc333 (1) (2) (3) (4) fig.6 equivalent level voltage v eq (wam and mph detector) as a function of level input at 21 khz. (1) was[1:0] = 11 = - 6 v/0.4 v. (2) was[1:0] = 10 = - 4 v/0.4 v. (3) was[1:0] = 01 = - 3 v/0.4 v. (4) was[1:0] = 00 = - 2 v/0.4 v. 11.2.8 s ubaddress 7h; snc table 51 format of data byte 7h with default setting table 52 description of data byte 7h bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 sst3 sst2 sst1 sst0 ssl1 ssl0 hcmp hcsf 01110100 bit symbol description 7 to 4 sst[3:0] start of the stereo blend snc. see table 53 and fig.7. 3 and 2 ssl[1:0] slope of the stereo blend snc. see fig.8. 1 hcmp high cut control source. 0 = control by the level (lev) detector; 1 = control by the multipath (mph) detector. 0 hcsf high cut control minimum bandwidth. 0 = 2 khz; 1 = 3 khz. 2003 oct 21 35 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 53 start of the stereo blend snc sst3 sst2 sst1 sst0 stereo noise control start voltage (v) 0 0 0 0 1.88 0 0 0 1 1.94 0010 2 0 0 1 1 2.06 0 1 0 0 2.13 0 1 0 1 2.19 0 1 1 0 2.25 0 1 1 1 2.31 1 0 0 0 2.38 1 0 0 1 2.44 1010 2.5 1 0 1 1 2.56 1 1 0 0 2.63 1 1 0 1 2.69 1 1 1 0 2.75 1 1 1 1 2.81 sst3 sst2 sst1 sst0 stereo noise control start voltage (v) handbook, halfpage 0.5 3 v eq (v) a cs (db) 50 0 10 20 30 40 1 1.5 2 2.5 mhc334 (1) (2) (3) (4) fig.7 channel separation a cs as a function of equivalent level voltage v eq (start). ssl[1:0] = 10 (1) sst[3:0] = 0000. (2) sst[3:0] = 0111. (3) sst[3:0] = 1000. (4) sst[3:0] = 1111. handbook, halfpage 3 v eq (v) a cs (db) 50 0 10 20 30 40 1 1.5 2 2.5 mhc335 (4) (3) (2) (1) fig.8 channel separation a cs as a function of equivalent level voltage v eq (slope). sst[3:0] = 1010 (1) ssl[1:0] = 00 = 38 db/v. (2) ssl[1:0] = 01 = 51 db/v. (3) ssl[1:0] = 10 = 63 db/v. (4) ssl[1:0] = 11 = 72 db/v. 2003 oct 21 36 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.9 s ubaddress 8h; highcut table 54 format of data byte 8h with default setting table 55 description of data byte 8h bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 hst2 hst1 hst0 hsl1 hsl0 hcf2 hcf1 hcf0 01101111 bit symbol description 7 to 5 hst[2:0] high cut control start (weak signal processing). see fig.9. 4 and 3 hsl[1:0] high cut control slope (weak signal processing). see fig.10. 2 to 0 hcf[2:0] fixed high cut control (maximum hcc bandwidth). see table 56 and fig.11. handbook, full pagewidth mhc336 0 0.5 v eq (v) 12 1.5 a hcc (db) 2.5 3 3.5 0 12 15 9 6 3 (1) (2) (3) (4) (5) (6) (7) (8) fig.9 high cut control attenuation a hcc as a function of equivalent level voltage v eq (start). (5) hst[2:0] = 100 = 2.5 v. (6) hst[2:0] = 101 = 3 v. (7) hst[2:0] = 110 = 3.5 v. (8) hst[2:0] = 111 = 4 v. hcf[2:0] = 111, hcsf = 0, hsl[1:0] = 10 and f audio =10khz (1) hst[2:0] = 000 = 1.5 v. (2) hst[2:0] = 001 = 1.75 v. (3) hst[2:0] = 010 = 2 v. (4) hst[2:0] = 011 = 2.25 v. 2003 oct 21 37 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 56 fixed high cut control handbook, halfpage 0 0.5 v eq (v) 12 1.5 a hcc (db) 2.5 0 b max (khz) unlimited wide 10 6.8 4.7 3.3 2.2 1.5 18 12 15 9 6 3 mhc337 hcsf = 0 hcsf = 1 (1) (2) (3) (4) fig.10 high cut control attenuation a hcc as a function of equivalent level voltage v eq (slope). hst[2:0] = 010 and f audio =10khz (1) hsl[1:0] = 00 = 9 db/v. (2) hsl[1:0] = 01 = 11 db/v. (3) hsl[1:0] = 10 = 14 db/v. (4) hsl[1:0] = 11 = 18 db/v. hcf2 hcf1 hcf0 b max (khz) 0001.5 0012.2 0103.3 0114.7 1006.8 10110 1 1 0 wide 1 1 1 unlimited handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc338 10 g hcc (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.11 high cut control gain g hcc as a function of audio frequency f audio (fixed hcc). 2003 oct 21 38 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.10 s ubaddress 9h; softmute table 57 format of data byte 9h with default setting table 58 description of data byte 9h bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 mst2 mst1 mst0 msl1 msl0 umd1 umd0 smon 01101011 bit symbol description 7 to 5 mst[2:0] soft mute start. a mute = 3 db; see fig.12. 4 and 3 msl[1:0] soft mute slope. see fig.13. 2 and 1 umd[1:0] usn mute depth. maximum soft mute attenuation of the soft mute via usn control; see fig.14. 0 smon soft mute enable. 0 = disable; 1 = enable. handbook, halfpage 0.25 0.75 v eq (v) 1.25 1.75 a mute (db) 2.25 0 60 48 36 24 12 mhc339 (1) (5) (6) (7) (8) (2) (3) (4) fig.12 soft mute attenuation a mute as a function of equivalent level voltage v eq (start). (5) mst[2:0] = 100 = 1.25 v. (6) mst[2:0] = 101 = 1.5 v. (7) mst[2:0] = 110 = 1.75 v. (8) mst[2:0] = 111 = 2 v. msl[1:0] = 11. (1) mst[2:0] = 000 = 0.75 v. (2) mst[2:0] = 001 = 0.88 v. (3) mst[2:0] = 010 = 1 v. (4) mst[2:0] = 011 = 1.12 v. handbook, halfpage 0.25 0.5 1.5 v eq (v) 0 6 18 24 12 0.75 1 a mute (db) 1.25 mhc340 (4) (2) (1) (3) fig.13 soft mute attenuation a mute as a function of equivalent level voltage v eq (slope). mst[2:0] = 000. (1) msl[1:0] = 00 = 8 db/v. (2) msl[1:0] = 01 = 16 db/v. (3) msl[1:0] = 10 = 24 db/v. (4) msl[1:0] = 11 = 32 db/v. 2003 oct 21 39 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, halfpage 0.25 0.5 1.5 v eq (v) 0 6 18 24 12 0.75 1 a mute (db) 1.25 mhc341 (1) ab (2) (3) (4) fig.14 soft mute depth a mute caused by ultrasonic noise. a. mst[2:0] = 000, msl[1:0] = 11 b. mst[2:0] = 100, msl[1:0] = 01 (1) umd[1:0] = 00 = 3 db. (2) umd[1:0] = 01 = 6 db. (3) umd[1:0] = 10 = 9 db. (4) umd[1:0] = 11 = 12 db. 11.2.11 s ubaddress ah; radio table 59 format of data byte ah with default setting table 60 description of data byte ah bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 am mono demp ing1 ing0 sear nbs1 nbs0 00100110 bit symbol description 7am am selection. 0 = fm mode selected; 1 = am mode selected. 6 mono stereo decoder mono. 0 = set to fm stereo; 1 = set to fm mono. 5 demp de-emphasis time constant. 0 = 75 m s; 1 = 50 m s; see fig.15. 4 and 3 ing[1:0] input gain. see table 61. 2 sear level and mph detector time constant. 0 = standard time constant selected; 1 = fast time constant of 60 ms selected. 1 and 0 nbs[1:0] am noise blanker and the fm noise blanker mpx sensitivity. see table 62. 2003 oct 21 40 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 61 input gain table 62 noise blanker sensitivity ing1 ing0 gain for fmmpx input (db) gain for am and mpxrds input (db) 00 0 0 01 3 3 10 6 6 1 1 23.5 0 nbs1 nbs0 sensitivity of fm noise blanker at mpxrds input (mv) sensitivity of am noise blanker (%) 0 0 90 110 0 1 150 140 1 0 210 175 1 1 270 220 fig.15 de-emphasis gain g de-em as a function of audio frequency f audio . (1) t de-em =50 m s. (2) t de-em =75 m s. handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc342 10 (1) (2) g de-em (db) f audio (hz) 10 2 10 3 10 4 10 5 2003 oct 21 41 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.12 s ubaddress bh; input and asi table 63 format of data byte bh with default setting table 64 description of data byte bh table 65 fm noise blanker level sensitivity table 66 audio input tone/volume part table 67 audio step interpolation time constant 11.2.13 s ubaddress ch; loudness table 68 format of data byte ch with default setting bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 nbl1 nbl0 inp1 inp0 mute asi ast1 ast0 10001100 bit symbol description 7 and 6 nbl[1:0] fm noise blanker level sensitivity. see table 65. 5 and 4 inp[1:0] audio input tone/volume part. see table 66. 3 mute audio mute. 0 = no mute; 1 = mute. 2 asi audio step interpolation. 0 = disable; 1 = enable. 1 and 0 ast[1:0] audio step interpolation time constant. asi time is 0 s when asi = 0; see table 67. nbl1 nbl0 sensitivity of fm noise blanker at level input (mv) 00 9 01 18 10 28 1 1 reserved inp1 inp0 audio input for tone/volume part 0 0 radio 01 cd 1 0 tape 1 1 phone ast1 ast0 asi time (ms) 00 1 01 3 10 10 11 30 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - ldn4 ldn3 ldn2 ldn1 ldn0 llf lhb - 0000011 2003 oct 21 42 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 69 description of data byte ch, see figs 16 to 19 table 70 loudness gain bit symbol description 7 - not used. set to logic 0. 6 to 2 ldn[4:0] loudness gain. see table 70. 1 llf loudness low boost frequency. 0 = 50 hz; 1 = 100 hz. 0 lhb loudness high boost enable. 0 = loudness low boost is enabled; 1 = loudness low boost and loudness high boost are enabled. ldn4 ldn3 ldn2 ldn1 ldn0 loudness control (db) 00000 0 00001 - 1 00010 - 2 ::::: : 10010 - 18 10011 - 19 10100 - 20 handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc343 10 g loudness (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.16 loudness gain g loudness as a function of audio frequency f audio ; low boost frequency 50 hz and high boost on. 2003 oct 21 43 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc344 10 g loudness (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.17 loudness gain g loudness as a function of audio frequency f audio ; low boost frequency 50 hz and high boost off. handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc345 10 g loudness (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.18 loudness gain g loudness as a function of audio frequency f audio ; low boost frequency 100 hz and high boost on. 2003 oct 21 44 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, full pagewidth - 24 - 20 - 16 - 12 - 8 - 4 - 22 - 18 - 14 - 10 - 6 - 2 6 4 2 0 mhc346 10 g loudness (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.19 loudness gain g loudness as a function of audio frequency f audio ; low boost frequency 100 hz and high boost off. 11.2.14 s ubaddress dh; volume table 71 format of data byte dh with default setting table 72 description of data byte dh table 73 volume setting bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - vol6 vol5 vol4 vol3 vol2 vol1 vol0 - 0100000 bit symbol description 7 - not used. set to logic 0. 6 to 0 vol[6:0] volume setting. see table 73. vol6 vol5 vol4 vol3 vol2 vol1 vol0 gain (db) 000110020 000110119 000111018 :::::::: 00111102 00111111 01000000 2003 oct 21 45 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.15 s ubaddress eh; treble table 74 format of data byte eh with default setting table 75 description of data byte eh, see fig.20 table 76 treble gain 0100001 - 1 0100010 - 2 :::::::: 1011010 - 58 1011011 - 59 1011100mute bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - tre2 tre1 tre0 trem trf1 trf0 - - 000101 - bit symbol description 7 - not used. set to logic 0. 6 to 4 tre[2:0] treble gain. see table 76. 3 trem treble attenuation or gain. 0 = attenuation; 1 = gain; see table 76. 2 and 1 trf[1:0] treble frequency. see table 77. 0 - not used. set to logic 0. tre2 tre1 tre0 trem treble control (db) 1111 14 1101 12 1011 10 1001 8 0111 6 0101 4 0011 2 0001 0 0000 0 0010 - 2 0100 - 4 0110 - 6 1000 - 8 1010 - 10 1100 - 12 1110 - 14 vol6 vol5 vol4 vol3 vol2 vol1 vol0 gain (db) 2003 oct 21 46 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 77 treble frequency trf1 trf0 treble frequency (khz) 00 8 01 10 10 12 11 15 fig.20 treble gain g treble as a function of audio frequency f audio , f treble = 10 khz. handbook, full pagewidth 0 5 10 15 20 - 20 - 5 - 10 - 15 mhc347 10 f audio (hz) g treble (db) 10 2 10 3 10 4 10 5 11.2.16 s ubaddress fh; bass table 78 format of data byte fh with default setting table 79 description of data byte fh, see figs 21 and 22 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 - bas2 bas1 bas0 basm baf1 baf0 bash - 0001100 bit symbol description 7 - not used. set to logic 0. 6 to 4 bas[2:0] bass gain. see table 80. 3 basm bass attenuation or gain. 0 = attenuation; 1 = gain; see table 80. 2 and 1 baf[1:0] bass frequency. see table 81. 0 bash bass frequency response. 0 = band-pass; 1 = shelve curve (only guaranteed for basm = 0). 2003 oct 21 47 philips semiconductors product speci?cation car radio integrated signal processor tef6892h handbook, full pagewidth - 18 18 14 - 10 - 14 10 6 2 - 2 - 6 mhc348 10 g bass (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.21 bass gain g bass as a function of audio frequency f audio ; bass frequency 60 hz, band-pass boost and shelve cut. handbook, full pagewidth - 18 18 14 - 10 - 14 10 6 2 - 2 - 6 mhc349 10 g bass (db) f audio (hz) 10 2 10 3 10 4 10 5 fig.22 bass gain g bass as a function of audio frequency f audio ; bass frequency 60 hz, band-pass boost and band-pass cut. 2003 oct 21 48 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 80 bass gain table 81 bass frequency 11.2.17 s ubaddress 10h; fader table 82 format of data byte 10h with default setting table 83 description of data byte 10h bas2 bas1 bas0 basm bass control (db) 1111 14 1101 12 1011 10 1001 8 0111 6 0101 4 0011 2 0001 0 0000 0 0010 - 2 0100 - 4 0110 - 6 1000 - 8 1010 - 10 1100 - 12 1110 - 14 baf1 baf0 bass frequency (hz) 00 60 01 80 1 0 100 1 1 120 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 -- fad4 fad3 fad2 fad1 fad0 fadm -- 000001 bit symbol description 7 and 6 - not used. set to logic 0. 5 to 1 fad[4:0] fader gain. see table 84. 0 fadm fader gain mode. 0 = front output attenuated; 1 = rear output attenuated. 2003 oct 21 49 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 84 fader gain 11.2.18 s ubaddress 11h; balance table 85 format of data byte 11h with default setting table 86 description of data byte 11h table 87 balance gain fad4 fad3 fad2 fad1 fad0 fader control (db) 00000 0 00001 - 1 00010 - 2 ::::: : 01110 - 14 01111 - 15 10000 - 17.5 10001 - 20 ::::: : 11010 - 42.5 11011 - 45 11100 - 48 11101 - 51 11110 - 55 11111 - 59 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bal6 bal5 bal4 bal3 bal2 bal1 bal0 balm 00000001 bit symbol description 7 to 1 bal[6:0] balance gain. see table 87. 0 balm balance gain mode. 0 = left channel attenuated; 1 = right channel attenuated. bal6 bal5 bal4 bal3 bal2 bal1 bal0 balance control (db) 00000000 0000001 - 1 0000010 - 2 :::::::: 1001101 - 77 1001110 - 78 1001111 - 79 1010000mute 2003 oct 21 50 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 11.2.19 s ubaddress 12h; mix table 88 format of data byte 12h with default setting table 89 description of data byte 12h 11.2.20 s ubaddress 13h; beep table 90 format of data byte 13h with default setting table 91 description of data byte 13h table 92 beep level bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 milf mirf milr mirr mulf murf mulr murr 00001111 bit symbol description 7 milf mixer left front lfout. 0 = no mix; 1 = mix with nav input and beep. 6 mirf mixer right front rfout. 0 = no mix; 1 = mix with nav input and beep. 5 milr mixer left rear lrout. 0 = no mix; 1 = mix with nav input and beep. 4 mirr mixer right rear rrout. 0 = no mix; 1 = mix with nav input and beep. 3 mulf mutes left front lfout. 0 = no mute; 1 = mute except for nav input and beep. 2 murf mutes right front rfout. 0 = no mute; 1 = mute except for nav input and beep. 1 mulr mutes left rear lrout. 0 = no mute; 1 = mute except for nav input and beep. 0 murr mutes right rear rrout. 0 = no mute; 1 = mute except for nav input and beep. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bel2 bel1 bel0 bef1 bef0 nav -- 000000 -- bit symbol description 7 to 5 bel[2:0] beep level. see table 92. 4 and 3 bef[1:0] beep frequency. see table 93. 2nav mute nav. 0 = mute; 1 = no mute. 1 and 0 - not used. set to logic 0. bel2 bel1 bel0 beep level (mv) 000mute 00113 01018 01128 10044 10160 11090 111150 2003 oct 21 51 philips semiconductors product speci?cation car radio integrated signal processor tef6892h table 93 beep frequency 11.2.21 s ubaddress 1fh; autogate table 94 format of data byte 1fh with default setting table 95 description of data byte 1fh bef1 bef0 beep frequency (hz) 0 0 500 0 1 1000 1 0 2000 1 1 3000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 aga6 aga5 aga4 aga3 aga2 aga1 aga0 agof ------- 1 bit symbol description 7 to 1 aga[6:0] i 2 c-bus device address de?nition. these bits de?ne the i 2 c-bus device address de?nition for the automatic control of the i 2 c-bus loop through gate. the subaddress auto-increment function reverts from sa = 30 to sa = 0, excluding the autogate byte (sa = 31). the autogate byte can only be accessed via direct subaddress selection of sa = 31, in which case auto-increment will revert to sa = 0. 0 agof autogate function enable. 0 = enable; 1 = disable [the autogate function is not compatible with the tea684x tuner devices. for the tea684x the use of the shortgate (sgat) function is advised]. 2003 oct 21 52 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 12 test and application information handbook, full pagewidth 220 nf 10 m f 10 m f 10 m f 10 m f 100 nf 22 nf 22 nf 47 m f 4.7 m f 22 20 21 24 27 28 29 30 32 16 17 18 23 25 26 cdl cdr cdcm tapel taper phone phcm fmmpx 220 nf 220 nf 220 nf 220 nf tef6892h 220 nf 220 nf 220 nf 100 nf 2.2 nf agnd dgnd jp12 jp11 rfout lfout lrout rrout am 5 7 nav scl scl sda sda v 2 (5 v) v 1 (8.5 v) 10 nf mpxrds level sdag sclg afsamp afhold fref 6 1 3 4 10 9 11 rdq jumper test pin and stocko connector coaxial connector (smc) mhc355 37 2 rdda 38 rdcl 39 42 43 jp5 jp4 jp6 jp7 jp8 jp9 10 k w 1 k w 10 k w 10 k w 10 k w 10 w jp10 jp13 agnd cref 41 44 dgnd dgnd addr rdsgnd v cc jp1 jp2 jp3 fig.23 test circuit. 2003 oct 21 53 philips semiconductors product speci?cation car radio integrated signal processor tef6892h this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth noise detect noise blanker pilot cancel input select 25 26 5 23 24 21 20 22 cdl 7 220 nf 220 nf 100 nf 10 nf cdr cdcm tapel taper phone phcm 7 am nice 6 mpxrds 1 level 3 4 scl sda 10 i.c. 8, 12, 13, 14, 15, 19, 31, 33, 34, 35, 36, 40 afsamp 9 afhold 37 38 39 2 rdsgnd mhc357 rdq rdda rdcl 42 sda 43 scl + + + + + + + - - pilot/ reference pll stereo decoder high cut f: 1.5 to 15 khz/wide stereo adjust roll-off correction fm/am noise detect nb sensitivity usn sensitivity level detection timings and control usn sclg 11 fref f ref sdag usn mpx snc start, slope hcc start, slope sm start, slope multipath/ weak signal detection and logic snc hcc detect sm hold rds demodulator 57 khz sclg write autogate i 2 c-bus interface supply read addr sdag rds pulse timer tef6892h pulse timer amnb amnb fmsnc amfm- softmute afu- mute asi asi asi time asi active level/off pitch on/off asi fmnb amfmhcc fmnb fmsnc amfm- hcc wam sensitivity amfm- softmute loudness input select 0 to - 20 db low f: 50/100 hz high boost de-emphasis 50/75 m s v ref standby 44 addr 41 dgnd 18 cref 17 agnd 22 nf 47 m f 4.7 m f 16 v cc 32 nav 100 nf 30 rrout 29 lrout 28 rfout 27 lfout detect wam wam afus reset/hold afumute i ref f ref treble audio step interpolation (asi) beep + 14 to - 14 db f: 8 to 15 khz + 14 to - 14 db f: 60 to 120 hz shelve/band-pass bass asi asi front/rear 0 to - 59 db front/ rear fader mute: lf, rf, lr, rr mix: lf, rf, lr, rr mute mix volume/ balance/ mute vol: + 20 to - 59 db bal: l/r, 0 to - 79 db mute 57 khz 38 khz 19 khz stereo detect level mode rds rds decoder fig.24 application diagram. 2003 oct 21 54 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 13 package outline unit a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec jeita mm 0.25 0.05 1.85 1.65 0.25 0.4 0.2 0.25 0.14 10.1 9.9 0.8 1.3 12.9 12.3 1.2 0.8 10 0 o o 0.15 0.1 0.15 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.95 0.55 sot307-2 97-08-01 03-02-25 d (1) (1) (1) 10.1 9.9 h d 12.9 12.3 e z 1.2 0.8 d e e b 11 c e h d z d a z e e v m a x 1 44 34 33 23 22 12 y q a 1 a l p detail x l (a ) 3 a 2 pin 1 index d h v m b b p b p w m w m 0 2.5 5 mm scale qfp44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm sot307-2 a max. 2.1 2003 oct 21 55 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 14 soldering 14.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. 14.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: below 225 c (snpb process) or below 245 c (pb-free process) C for all bga and ssop-t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. below 240 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c. 2003 oct 21 56 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 14.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the reflow oven. the package body peak temperature must be kept as low as possible. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 8. hot bar or manual soldering is suitable for pmfp packages. package (1) soldering method wave reflow (2) bga, lbga, lfbga, sqfp, ssop-t (3) , tfbga, vfbga not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable plcc (5) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (5)(6) suitable ssop, tssop, vso, vssop not recommended (7) suitable pmfp (8) not suitable not suitable 2003 oct 21 57 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 15 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). 16 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 oct 21 58 philips semiconductors product speci?cation car radio integrated signal processor tef6892h 18 purchase of philips i 2 c components purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011. ? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands 753503/01/pp 59 date of release: 2003 oct 21 document order number: 9397 750 10355 |
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